In an integrated circuit, designers seek to increase the circuit density. In other words, designers seek to place more electronic devices in the same amount of space. The active devices are located in what is referred to active areas. The other areas are filled with insulators, spacers, or gaps that simply cannot be used due to the limitations of a particular layout design or the fabrication equipment.
In optical sensors, designers seek to increase the amount of space used for photodiodes (or any other type of optical sensor) as compared to other devices. This allows for larger photosites or for more photosites in the same amount of space, increasing the quality of the sensor output, or decreasing the total size of the sensor with the same quality, or both. For an optical sensor, increasing the amount of active area for the same amount of total area can allow for higher quality circuitry or for the space used for electronic devices other than photosites to be reduced.
STI (Shallow Trench Isolation) and STI implant protection are used in integrated circuits to protect devices from other nearby devices. STI is particularly useful to protect against devices that accumulate a charge, such as capacitors, photodiodes, and power supply components. When transistors use STI and STI implant protection, the width of the active area of the device becomes much smaller. For a transistor, the active area under a gate area will typically be reduced. As a result, the device is rendered less effective or must be made larger to accommodate the STI and STI implant protection.
For photodiodes and sensor arrays, as processes scale down and devices become smaller, the amount of charge accumulated by the photodiodes becomes smaller. As the level of signal is reduced, the signal-to-noise ratio becomes smaller. In order to maintain the same signal quality, the noise levels must also be reduced. One source of noise in sensor arrays is RTS (Random Telegraph Signal) noise, although there are other noise sources as well. RTS noise is caused, at least in part, by defects at interfaces between Si and SiO2 layers in the system. It is believed that charge carriers are trapped and detrapped at these interface defects. The measured charge at the other side of the defect will be increased or decreased randomly as charge flows across the defect. While such noise can cause problems in a variety of devices, it has a noticeable effect with an in-pixel source-follower transistor. At low light levels, RTS noise from the source-follower is a significant noise source limiting imaging quality.
A variety of noise reduction techniques are used to reduce the impact of RTS noise. Correlated double sampling, for example, reduces the impact of a variety of random noise sources. However, it does not completely eliminate RTS noise. The pixel can also be physically modified to reduce the impact of RTS and other noise sources. A buried channel source-follower has less RTS noise. This may be because the buried channel pushes the highest potential in the channel away from the Si—SiO2 interface, minimizing the possibility of carriers being trapped by defects at Si—SiO2 interfaces. These approaches all require more area, reducing the pixel density and increasing cost.